:key: Technology-agnostic Physical Unclonable Function (PUF) hardware mo...
Simple UART controller for FPGA written in VHDL
A parser for Value Change Dump (VCD) files as specified in the IEEE Syst...
A reimplementation of a tiny stack CPU
Interface for MSX to Connect and use Raspberry Pi resources
Streaming based VHDL parser.
A JSON library implemented in VHDL.
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast F...
QNICE-FPGA is a 16-bit computer system for recreational programming buil...
Tools for running FPGA vendor toolchains with Docker
Spins of Grant Searle's MultiComp project on various hardware
Caffe to VHDL
Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulati...
VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin
Examples of using PSL for functional and formal verification of VHDL wit...