GDS3D is an application that can interpret so called IC layouts and rend...
Custom chips reverse-engineered from silicon
🎲 A Tiny and Platform-Independent True Random Number Generator for any ...
Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
HW Design: A Functional Approach
KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi
The next generation of OpenLane, rewritten from scratch with a modular a...
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5...
An AXI4 crossbar implementation in SystemVerilog
A simplified and standardized interface for Bitcoin ASICs.
Index of the fully open source process design kits (PDKs) maintained by ...
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional perip...
Control and status register code generator toolchain