Generic FPGA SDRAM controller, originally made for AS4C4M16SA
The code in this repository lets you control an SDRAM chip without licensing IP from anyone.
src/
and add them to your own project. If you use hdlmake, you can add this repository itself as a remote module.top/mkrvidor4000_quartus/mkrvidor4000_top.sv
for a usage example with clock domain crossing. A dual-clock FIFO is used to move data from the SDRAM to HDMI to display a test pattern. The test pattern is composed only of red and green. If you see blue, the pattern is incorrect.sdram_controller.sv
and tailor any instantiations to your situation.wire
instead of logic
for DQ and the clock. This caused synthesis issues for me where the pins were stuck at GND or VCC when they were clearly being driven.These documents are not hosted here! They are available directly from Alliance Memory.