A modern hardware definition language and toolchain based on Python
OpenLane is an automated RTL to GDSII flow based on several components i...
CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR
A refreshed Python toolbox for building complex digital hardware. See ht...
An abstraction library for interfacing EDA tools
draws an SVG schematic from a JSON netlist
SystemVerilog to Verilog conversion
Caravel is a standard SoC harness with on chip resources to control and ...
Caravel is a standard SoC hardness with on chip resources to control and...
A VHDL frontend for Yosys
FPGA tool performance profiling
Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
XCrypto: a cryptographic ISE for RISC-V
Arduino compatible – Cortex M4F & FPGA Development Board
A Python package to use FPGA development tools programmatically.