A PDF processor written in Go.
Native Operating System and Hardware Information
☔️ interface for parsing, inspecting, transforming, and serializing con...
Intel® Performance Counter Monitor (Intel® PCM)
CoreFreq is a CPU monitoring and tuning software designed for 64-bit pro...
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
A list of ICs and IPs for AI, Machine Learning and Deep Learning.
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V sof...
Mixin is a trait/mixin and bytecode weaving framework for Java using ASM
VeeR EH1 core
A tiny Open POWER ISA softcore written in VHDL 2008
The OpenPiton Platform
RISC-V processor emulator written in Rust+WASM
Cross-platform process cpu % and memory usage of a PID
RISC-V Guide. Learn all about the RISC-V computer architecture along wit...