AXI SystemVerilog synthesizable IP modules and verification infrastructu...
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integ...
Network on Chip Implementation written in SytemVerilog
RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs ...
RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti,...