Open-source high-performance RISC-V processor
Chisel: A Modern Hardware Design Language
Rocket Chip Generator
SonicBOOM: The Berkeley Out-of-Order Machine
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order c...
Simple RISC-V 3-stage Pipeline in Chisel
Work in progress prototype for the Chisel Level Editor, for Unity
A .NET XOR encrypted cobalt strike aggressor implementation for chisel t...
Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket M...
The batteries-included testing and formal verification library for Chise...
Establish a Reverse Tunnel between different servers and clients. IPV4 |...
Support files for participating in a Fomu workshop
Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
A dynamic verification library for Chisel.
All-in-one OPIran scripts