SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!
New release providing Pypi distribution and misc. fixes
Full Changelog: https://github.com/dpretet/svut/compare/v1.6.0...v1.6.1
Misc. updates for this new iteration:
A minor release to print SVUT version, start and stop time of the execution