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This release version bumps RISC-V SBI specification version to 2.0-rc1. It will include debug console extension and minor SBI 2.0 modifications. Debug Console extension will allow developers to print debug information before their kernel's driver system has initialized; this extension should not be used anymore after drivers loaded.

Developers should note that after RustSBI 0.4.0 release, legacy SBI extensions will no longer be supported. Minor fixes and patches to this version should be applied based on v0.3.2 branch.

Special thanks to @YdrMaster, @duskmoon314 and @luojia65 and other individuals for their contributions to this release.

Details to this release are as follows:

Added

• pmu: counter_fw_read_hi function in SBI 2.0-rc1
• lib: memory address parameters and DBCN extension
• lib: adds feature sbi_2_0 and gate pmu read_hi

Modified

• doc: amend using SBI 2.0-rc1 specification

Fixed

• impl<T: Console> Console for &T

This minor release version fixes issue on dependency riscv, it chooses riscv 0.10.1 other than yanked version 0.9.0. For further information on this issue, refer to https://github.com/rust-embedded/riscv/pull/121.

Special thanks to @YdrMaster, @tfx2001 and @luojia65 and other individuals for their contributions to this release.

Details to this minor release are as follows:

• Update dependency crate riscv to version 0.10.1
• Use let-else to simplify code, bump MSRV to 1.65.0

We are proud to release RustSBI version 0.3.0. In this version, we improved developement experience on bare-metal RustSBI bootloader implementation, introduce RustSBI to hypervisor and emulator development, remove dependency on heap memory, make RustSBI build on stable Rust, and improve documents and comments on RustSBI project. Now you may run RustSBI on not only bare-metal RISC-V machine, but also virtualized systems and hardware accelerated RISC-V emulation environments.

A wide range of RustSBI ecosystem projects have also received upgrades, see Awesome RustSBI for details.

Special thanks to @duskmoon314, @orangecms, @YdrMaster, @luojia65 and more individuals, OSFW community and TUNA Embedded community for contribution to this release.

Detailed changelog as follows:

Added

• Instance based and/or machine independent RustSBI to support hypervisor development
• Structure MachineInfo for non-machine environment, e.g. cross-architecture emulator
• Builder structure for instance based RustSBI framework
• Implement RustSBI traits for their references
• Extensive documents for hypervisors, emulators and machine environments using RustSBI
• Feature legacy to gate SBI legacy extension
• Expose init_* functions on instance based RustSBI implementation
• LEGACY_CLEAR_IPI implemented

Modified

• Probe function now returns if legacy extensions are available
• Update to riscv crate 0.9.0, sbi-spec crate version 0.0.4
• Rename send_ipi_many to send_ipi

Removed

• Remove dependency on crate alloc; RustSBI now works without heap
• Remove embedded-hal serial adapter to legacy console

This update adapts RustSBI to ratified RISC-V SBI v1.0.0 specification. To use ratified v1.0.0 SBI features, it's recommended to update RustSBI library dependency to latest version.

Added

• Support for RISC-V SBI v1.0.0 Ratified Specification
• Internal guest and instance module

Modified

• Use Rust 2021 edition
• Update dependency embedded-hal to v0.2.7

Important: this update fixes a severe bug on IPI module. The previous version of RustSBI did not follow the SBI definition of IPI module on SBI v0.3 format. Users are encouraged to use 0.2.1 and newer version instead of yanked 0.2.0 version.

Fixed

• Severe bug on IPI does not follow new SBI version convention rule
• Pass cargo test on docs, add test cases on hart mask

Modified

• Internal speed up to new SBI v0.3+ IPI procedure
• Reduce code size by inlining internal functions

From this version and on, RustSBI is split into a library and multiple implementation repositories. Further releases only include project library other than RustSBI implementation binaries for all platforms.

Added

• Support for RISC-V SBI v0.3 Specification
• S-level Illegal instruction exception is now delegated into S-level software handler
• Support RFENCE extension in RustSBI framework
• Added a test kernel to test SBI function on RustSBI implementations
• Support device tree binary in K210 platform
• Support SBI v0.3 hart suspend function
• Support PMU extension trait and init function
• Use fat pointer cell to support asynchronous hart state monitor module
• Build under new asm! macro

Modified

• Reform RustSBI project into a library
• Function rustsbi::ecall now require a0-a5 input parameters
• Enhanced in-line code documents from SBI standard
• Now IPI module requires to return an SbiRet value
• Remove use of global_asm and llvm_asm in test kernel
• Align to 4 bytes for interrupt handler on QEMU and test kernel
• Update riscv crate dependency for QEMU platform
• Use mtval to read instruction on QEMU; still need to be kept on K210 as 1.9.1 does not define this register behavior
• Modify second parameter of enter_privileged to opaque other than dtb_pa
• Dump all trap frame registers when exception happened in reference implementations
• Use embedded-hal dependency version 0.2.6
• Change to asynchronous lock structure trait style
• Function num_counters returns usize and its SBI call must return SBI_SUCCESS
• Use amo mutex for legacy stdio handler; remove dependency on lazy_static and spin
• Improve documents to adapt to v1.0-rc2 specification

Fixed

• Test kernel console now will lock before println line is finished
• Non-legacy supervisor IPI extension is fixed
• Returns -1 other than 0 when legacy console getchar function fails; thank you @duskmoon314

This is a preview version of RustSBI 0.2.0.

Added

• S-level Illegal instruction exception is now delegated into S-level software handler
• Support RFENCE extension in RustSBI framework
• Added a test kernel to test SBI function on RustSBI implementations
• Support device tree binary in K210 platform

Modified

• Function rustsbi::ecall now require 5 input parameters
• Enhanced in-line code documents from SBI standard
• Now IPI module requires to return an SbiRet value
• Remove use of global_asm and llvm_asm in test kernel
• Align to 4 bytes for interrupt handler on QEMU and test kernel
• Update riscv crate dependency for QEMU platform
• Use mtval to read instruction on QEMU; still need to be kept on K210 as 1.9.1 does not define this register behavior
• Modify second parameter of enter_privileged to opaque other than dtb_pa
• Dump all trap frame registers when exception happened in reference implementations

Fixed

• Test kernel console now will lock before println line is finished
• Non-legacy supervisor IPI extension is fixed

Each release zip file contains an ELF file and a binary file. Install the binary into target, and use the ELF to help debugging if needed.

Added

• Abstract support for HSM and SRST extensions
• Support SRST extension using test device on QEMU
• Count harts from device tree binary on QEMU platform
• Show hart id on panic for QEMU platform

Modified

• Use '#[naked]' instead of global assembly in newer Rust version for RustSBI platforms

Fixed

• Fix init_hsm function which is not exported before
• Small fixes on library documents

RustSBI is adapted to SBI standard with implementation number 4.

Added

• Implementation specific SBI module 0x0A000004 defined
• K210 specific sbi_rustsbi_k210_sext SBI call

Modified

• Update private SBI function to K210 implementation

Fixed

• Delegate instruction load/store faults to S mode, allowing legacy console getchar to work on K210 (#7).
• Fixed 64-bit and 32-bit instruction value for target pointer widths
• Fixed readme document path for crates.io

Each release zip file contains an ELF file and a binary file. Install the binary into target, and use the ELF to help debugging if needed.

This release has:

• Support for Kendryte K210 with MMU and S-Mode
• Support for QEMU
• SBI v0.2 TIME extension and IPI extension
• RISC-V ISA both RV32 and RV64
• RISC-V Privileged Specification v1.11
• Backward compatible to privileged spec v1.9.1

Each release zip file contains an ELF file and a binary file. Install the binary into target, and use the ELF to help debugging if needed.