Openwifi Versions Save

• Major update to more popular Raspberry PI OS (based on ADI Linux 2021_r1)
  • Raspbian 11.2 bullseye
• More WiFi security research friendly: Successfully run following security test tools by https://github.com/vanhoefm
  • https://github.com/vanhoefm/fragattacks
  • https://github.com/vanhoefm/krackattacks
• Major update to newer FPGA toolchain Vivado 2021.1 (based on ADI HDL 2021_r1)
• More openwifi based research results: https://github.com/open-sdr/openwifi/blob/master/doc/publications.md
• More hardwares: sdrpi, antsdr_e200, neptunesdr (non official yet), PYNQSDR (non official yet)
• Single SD card image for both 32bit and 64bit hardware
• Correct the SIFS (Short Inter Frame Spacing) value in 5GHz 10 --> 16us
• More parameters (fft_win_shift) for PHY OFDM receiver
• Split FPGA source code (openwifi-hw) and FPGA bitstream files (openwifi-hw-img)
• Better RF. Sensitivity same as COTS WiFi chip. EVM even meet #wifi7 requirement.
• The ACK Tx timing depends on PHY decoding latency (depends on how many bits in the last OFDM symbol received)
• FPGA internal loopback works now: https://github.com/open-sdr/openwifi/blob/master/doc/app_notes/packet-iq-self-loopback-test.md#csi-fpga-self-loopback-quick-start

openwifi https://github.com/open-sdr/openwifi/commit/42e8e675188b0ffaa4fcf7af41c29013ac231fe6 openwifi-hw https://github.com/open-sdr/openwifi-hw/commit/af0bc1a17618b77cfe75c17c42432a6c0858743d openofdm https://github.com/open-sdr/openofdm/commit/19acdbe82f96125ca0c7cef09ba2cf1411cba8e7 openwifi-hw-img https://github.com/open-sdr/openwifi-hw-img/commit/b6b3600dbe090ba03f553c119772d6cecc4e5d34

openwifi-hw: https://github.com/open-sdr/openwifi-hw/commit/73c2e188e0973791534d4f5137f394b4c1810913 openofdm_rx: https://github.com/open-sdr/openofdm/commit/064bbe4250672c1237ad053d1a1c54113c30de75

1. Conditional compiling framework. Please read openwifi and openwifi-hw README
2. Driver and FPGA dynamic reloading

It includes lots of essential improvements (but not limited to):

• AMPDU (Aggregated MAC PDU)
• Achieve self-interference free in OTA test while achieving fast TDD turnaround time (0.6us)
• Essential improvements on RF, baseband/FPGA and driver. iperf: TCP 40~50Mbps; UDP 50Mbps (best case AMPDU on); EVM -39dB; MCS0 sensitivity -85dBm (no external LNA); MCS7 -73dBm. (Both conducted/cable and radiated/OTA test)
• More app notes about: CSI radar; Packet, IQ sample and CSI self-loopback test; CSMA and arbitrary frequency/channel setting; FPGA and driver event/packet statistics; and more.

FPGA resource and timing report: 20220330084857-pre-release-report.zip

version:1.2.0 code name: leuven

Highlight:

1. App notes are added to the project on many specific topics
2. Three external contributors are acquired

New features:

1. 802.11n (WiFi 4)
2. Arbitrary 802.11 packet injection from user space
3. CSI (Channel State Information, freq offset, equalizer to computer)
4. IQ capture (single/dual antenna, real-time AGC, RSSI, IQ sample to computer)

Improvements/fixes:

1. Increase the number of TX queue in FPGA from 2 to 4
2. New FPGA ARM interaction mechanism to avoid crash
3. PHY rx performance optimization (channel estimation, frequency offset, etc)
4. Improve low MAC to align with the standard better

version:1.1.0 code name: taiyuan

1. Extend to low end zynq 7020 FPGA which is used by Zed board, zc702 board and adrv9364z7020 SoM. In total 6 platforms are supported:

   1. zc706_fmcs2 (Xilinx ZC706 dev board + FMCOMMS2/3/4)
   2. adrv9361z7035 (ADRV9361Z7035 SOM + ADRV1CRR-BOB carrier board)
   3. adrv9361z7035_fmc (ADRV9361Z7035 SOM + ADRV1CRR-FMC carrier board)
   4. zed_fmcs2 (Xilinx zed board + FMCOMMS2/3/4)
   5. adrv9364z7020 (ADRV9364Z7020 SOM + ADRV1CRR-BOB carrier board)
   6. zc702_fmcs2 (Xilinx ZC702 dev board + FMCOMMS2/3/4)

2. A guide for users porting openwifi to a new platform is offered in README.

3. Logic optimization/reduction. Zed: 19k LUT, 76.5 BRAM, 121 DSP; Zc706: 21k LUT, 73.5 BRAM, 98 DSP.

   1. Remove unnecessary modules.
   2. Openofdm_tx core consumes less clock cycles than before when generating I/Q samples, so that the whole design can run at 100MHz when low speed grade FPGA (7020, -1) is used. 7035 -2/-2L and above is still using a 200MHz clock.
   3. Use FIR in ad9361, so that FIR can be removed from FPGA.

4. Easier operation. Use scripts to group lots of commands. Now routine development updates of the driver, FPGA and Linux image becomes much easier than before.

5. Optimize the Linux image. Now it can work out-of-box for 6 platforms after the user copies correct BOOT.BIN and devicetree.dtb from the corresponding subdirectory to the base directory of BOOT partition (Like the operation needed for Analog Device image). This is achieved by solving the issue of Linux remembering Ethernet MAC address after running -- this prevents the Linux SD card image use eth0 as NIC name when the SD card is used in a new board (same type and configuration for the new board).

6. Fix the monitor mode bug by solving the potential memory access across boundary in rx interrupt. Thanks to https://github.com/bd467913 for reporting the monitor mode crash issue.

7. Give the patch to wpa_supplicant for the case when using wpa_supplicant over commercial Wi-Fi card to connect openwifi AP. Because openwifi doesn’t support 11b.

8. Add the tsf set command to sdrctl tool. Now users can set the TSF (Time Synchronization Function) timer in FPGA with a single sdrctl command. Before this, two successive sdrctl commands have to be used.

Since the first commit, there is only some README change. No code change. So we mark this status as the 1st release:

version:1.0.0 code name: ghent