Neorv32 Versions Save

:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

v1.9.9

1 week ago

What's Changed

minor rtl clean-ups and optimization by @stnolting in https://github.com/stnolting/neorv32/pull/872
use simplified VHDL file headers by @stnolting in https://github.com/stnolting/neorv32/pull/873
:warning: rename SLINK data interface registers by @stnolting in https://github.com/stnolting/neorv32/pull/874
:warning: simplify XBUS gateway by @stnolting in https://github.com/stnolting/neorv32/pull/876
[DMA] use FIRQ select instead of FIRQ mask by @stnolting in https://github.com/stnolting/neorv32/pull/877
rtl logic optimization and cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/880
fix external debug-halt vs. exception concurrency by @stnolting in https://github.com/stnolting/neorv32/pull/882
minor rtl fixes by @stnolting in https://github.com/stnolting/neorv32/pull/883
[rtl] fix single-step halting by @stnolting in https://github.com/stnolting/neorv32/pull/887
minor rtl cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/889
Fix UART receiver by @Unike267 in https://github.com/stnolting/neorv32/pull/891

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.8...v1.9.9

v1.9.8

1 month ago

What's Changed

CPU RTL optimization by @stnolting in https://github.com/stnolting/neorv32/pull/857
:warning: remove WDT + TRNG interrupts; :bug: fix bug in core-complex clocking during sleep by @stnolting in https://github.com/stnolting/neorv32/pull/858
:warning: rework ONEWIRE and GPTMR interrupts by @stnolting in https://github.com/stnolting/neorv32/pull/859
:warning: rework TWI interrupt by @stnolting in https://github.com/stnolting/neorv32/pull/860
:bug: fix DMA fence flag, :warning: rework CPU FIRQs by @stnolting in https://github.com/stnolting/neorv32/pull/864
Support tool-specific standard flags in makefile by @jpf91 in https://github.com/stnolting/neorv32/pull/862
:warning: rework TWI module by @stnolting in https://github.com/stnolting/neorv32/pull/865
add back TWI clock stretching option by @stnolting in https://github.com/stnolting/neorv32/pull/867
[SLINK] split interrupt into two FIRQs by @stnolting in https://github.com/stnolting/neorv32/pull/868
B ISA extensions only contains Zba + Zbb + Zbs by @stnolting in https://github.com/stnolting/neorv32/pull/869
add additional SPI and SDI interrupt conditions by @stnolting in https://github.com/stnolting/neorv32/pull/870

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.7...v1.9.8

v1.9.7

1 month ago

What's Changed

[rtl] add generic cache module (not used yet) by @stnolting in https://github.com/stnolting/neorv32/pull/842
rtl cleanups and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/843
⚠️ remove Wishbone tag signal by @stnolting in https://github.com/stnolting/neorv32/pull/845
⚠️⚠️ Rename external bus interface by @stnolting in https://github.com/stnolting/neorv32/pull/846
✨ Add optional external bus interface cache (XCACHE) by @stnolting in https://github.com/stnolting/neorv32/pull/849
:warning: processor configuration edits / clean-ups by @stnolting in https://github.com/stnolting/neorv32/pull/850
Minor cache updates by @stnolting in https://github.com/stnolting/neorv32/pull/851
[litex] update core complex wrapper by @stnolting in https://github.com/stnolting/neorv32/pull/852
rework cache system by @stnolting in https://github.com/stnolting/neorv32/pull/853
Connected SPI bus to on-board Flash and SPI peripheral by @lovelesh-mis in https://github.com/stnolting/neorv32/pull/854
Update CFU example: use XTEA as "real world" demo application by @stnolting in https://github.com/stnolting/neorv32/pull/855
Updated Performance test by @mikaelsky in https://github.com/stnolting/neorv32/pull/844

New Contributors

@lovelesh-mis made their first contribution in https://github.com/stnolting/neorv32/pull/854

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.6...v1.9.7

v1.9.6

2 months ago

What's Changed

Allow disabling certain PMP modes by @stnolting in https://github.com/stnolting/neorv32/pull/808
[revert] remove page faults support by @stnolting in https://github.com/stnolting/neorv32/pull/809
:bug: Fix bug in CRT0 trap handler by @stnolting in https://github.com/stnolting/neorv32/pull/812
:warning: Rework hardware performance monitor (HPM) events by @stnolting in https://github.com/stnolting/neorv32/pull/811
🧪 [makefile] pass CC_OPTS variable as define string by @stnolting in https://github.com/stnolting/neorv32/pull/813
⚠️ remove Smcntrpmf ISA extension by @stnolting in https://github.com/stnolting/neorv32/pull/814
[sim] add simulation check to sw makefiles as target 'sim-check' by @umarcor in https://github.com/stnolting/neorv32/pull/817
[SLINK] add AXI-stream-compatible "tlast" signals by @stnolting in https://github.com/stnolting/neorv32/pull/815
[docs/userguide/simulating_the_processor] add admonition and recommend MARCH=rv32im to build hello_world by @umarcor in https://github.com/stnolting/neorv32/pull/819
[ci] split SoftwareFrameworkTests from simple testbench simulation by @umarcor in https://github.com/stnolting/neorv32/pull/820
🐛 Fix write access to mip.firq CSR bits by @stnolting in https://github.com/stnolting/neorv32/pull/821
[ci] test example hello_world as well by @umarcor in https://github.com/stnolting/neorv32/pull/822
[fifo] fix (Vivado) synthesis issue by @stnolting in https://github.com/stnolting/neorv32/pull/827
optimize FIFO component to improve mapping by @stnolting in https://github.com/stnolting/neorv32/pull/828
Added dummy clocks for SLINK streams in AXI4-Lite wrapper by @robhancocksed in https://github.com/stnolting/neorv32/pull/831
:bug: fix atomic write/clear/set accesses of clear-only CSR bits by @stnolting in https://github.com/stnolting/neorv32/pull/829
[sw] remove unused variable RISCV_TOOLCHAIN by @umarcor in https://github.com/stnolting/neorv32/pull/832
:bug: fix GPTMR threshold = 0 configuration by @stnolting in https://github.com/stnolting/neorv32/pull/834
Small correction in user guide by @davidgussler in https://github.com/stnolting/neorv32/pull/835

New Contributors

@robhancocksed made their first contribution in https://github.com/stnolting/neorv32/pull/831
@davidgussler made their first contribution in https://github.com/stnolting/neorv32/pull/835

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.5...v1.9.6

v1.9.5

2 months ago

What's Changed

fix trap priority by @stnolting in https://github.com/stnolting/neorv32/pull/784
Add support for page fault exceptions by @stnolting in https://github.com/stnolting/neorv32/pull/786
[cpu] fix minor bug in instruction request bus by @stnolting in https://github.com/stnolting/neorv32/pull/790
Fix for issue #785: FPU fflags no being asserted correctly by @mikaelsky in https://github.com/stnolting/neorv32/pull/788
🐛 [cpu] fix non-stable privilege signal of instruction interface by @stnolting in https://github.com/stnolting/neorv32/pull/792
[CPU] close further illegal instruction loopholes by @stnolting in https://github.com/stnolting/neorv32/pull/797
✨ add optional XIP cache by @stnolting in https://github.com/stnolting/neorv32/pull/799
add fence signal to CPU bus by @stnolting in https://github.com/stnolting/neorv32/pull/800
:bug: fix fence signal pass-through in caches by @stnolting in https://github.com/stnolting/neorv32/pull/802
[rtl] fix HPM null range assertions by @stnolting in https://github.com/stnolting/neorv32/pull/803
minor rtl edits by @stnolting in https://github.com/stnolting/neorv32/pull/804
Fixes to the FPU for issue #791 by @mikaelsky in https://github.com/stnolting/neorv32/pull/794
:bug: fix another C-ISA loophole by @stnolting in https://github.com/stnolting/neorv32/pull/806
Add DMA fence operation by @stnolting in https://github.com/stnolting/neorv32/pull/807

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.4...v1.9.5

v1.9.4

3 months ago

What's Changed

[rtl] minor cleanups and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/764
[rtl] optimize bus switch by @stnolting in https://github.com/stnolting/neorv32/pull/769
:bug: Remove RVC float load/store instructions by @stnolting in https://github.com/stnolting/neorv32/pull/771
✨ add optional CPU clock gating by @stnolting in https://github.com/stnolting/neorv32/pull/775
:bug: fix typo that renders the clock gating useless by @stnolting in https://github.com/stnolting/neorv32/pull/776
[rtl] improve CPU front end by @stnolting in https://github.com/stnolting/neorv32/pull/777
Updated FIFO NULL assertion fix by @mikaelsky in https://github.com/stnolting/neorv32/pull/778
set top entiy input defaults to 'L' or 'H' by @stnolting in https://github.com/stnolting/neorv32/pull/779
🧪 extend switchable clock domain by @stnolting in https://github.com/stnolting/neorv32/pull/780
Fix for issue #782 by @mikaelsky in https://github.com/stnolting/neorv32/pull/783

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.3...v1.9.4

v1.9.3

4 months ago

What's Changed

✨ Add RISC-V Zicond ISA extension by @stnolting in https://github.com/stnolting/neorv32/pull/743
[rtl] reset mstatus.mpp to machine-mode by @stnolting in https://github.com/stnolting/neorv32/pull/745
refine behaviour of CPU sleep signal by @stnolting in https://github.com/stnolting/neorv32/pull/746
[rtl] minor rtl code cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/747
[sw] Clean-up software framework by @stnolting in https://github.com/stnolting/neorv32/pull/752
[rtl] rework FIFO module (to allow inferring block RAM) by @stnolting in https://github.com/stnolting/neorv32/pull/754
[rtl] minor edits, clean-ups and optimizations; 🔒 set mepc/mtvec/dpc reset value to CPU boot address by @stnolting in https://github.com/stnolting/neorv32/pull/755
Add GPTMR timer capture by @stnolting in https://github.com/stnolting/neorv32/pull/759
[rtl] minor code cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/760
[rtl/core] add again mtime_o to top entity by @mcoroyer in https://github.com/stnolting/neorv32/pull/762
[rtl] fix minor VHDL coding style issue by @stnolting in https://github.com/stnolting/neorv32/pull/763

New Contributors

@mcoroyer made their first contribution in https://github.com/stnolting/neorv32/pull/762

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.2...v1.9.3

v1.9.2

5 months ago

What's Changed

Fix comment mistake by @Unike267 in https://github.com/stnolting/neorv32/pull/727
[SPI] re-add high-speed mode by @stnolting in https://github.com/stnolting/neorv32/pull/730
[XIP] add clock divider for fine-tuning by @stnolting in https://github.com/stnolting/neorv32/pull/731
🐛 [FPU] fix wiring of exception flags by @stnolting in https://github.com/stnolting/neorv32/pull/733
🐛 fix bug in instruction-misaligned exception handling by @stnolting in https://github.com/stnolting/neorv32/pull/734
[rtl] cleanup & rework/optimize CPU branch system by @stnolting in https://github.com/stnolting/neorv32/pull/735
✨ Add "ASIC style" register file option by @stnolting in https://github.com/stnolting/neorv32/pull/736
[rtl] Cleanup/update assertions and "auto-configuration" by @stnolting in https://github.com/stnolting/neorv32/pull/738
Update hardware tigger module (Sdtrig) to version 1.0 by @stnolting in https://github.com/stnolting/neorv32/pull/739
Add menvcfg[h] CSRs by @stnolting in https://github.com/stnolting/neorv32/pull/741
[RTE] minor updates by @stnolting in https://github.com/stnolting/neorv32/pull/742

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.1...v1.9.2

v1.9.1

5 months ago

What's Changed

Update software framework to gcc-13.2.0 by @stnolting in https://github.com/stnolting/neorv32/pull/705
[cpu] minor cleanups and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/707
⚠️ remove Zifencei generic - Zifencei ISA extension is now always enabled by @stnolting in https://github.com/stnolting/neorv32/pull/709
[sw/lib] add nerov32-flavored vprintf funtion by @stnolting in https://github.com/stnolting/neorv32/pull/711
[sim] Add GHDL run flags variable by @stnolting in https://github.com/stnolting/neorv32/pull/715
Move FreeRTOS port & demo into new repository by @stnolting in https://github.com/stnolting/neorv32/pull/716
Fix bug in neorv32_slink_available() function by @Unike267 in https://github.com/stnolting/neorv32/pull/717
[rtl] cleanups and code beautification by @stnolting in https://github.com/stnolting/neorv32/pull/718
[sw] update crt0's early-boot trap handler by @stnolting in https://github.com/stnolting/neorv32/pull/719
[rtl] upgrade neoTRNG to version 3 by @stnolting in https://github.com/stnolting/neorv32/pull/721
Fix-up the litex wrapper by @Unike267 in https://github.com/stnolting/neorv32/pull/722
minor rtl code cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/723
🧪 provide full hardware reset for all FFs by @stnolting in https://github.com/stnolting/neorv32/pull/724

New Contributors

@Unike267 made their first contribution in https://github.com/stnolting/neorv32/pull/717

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.9.0...v1.9.1

v1.9.0

6 months ago

What's Changed

minor rtl edits by @stnolting in https://github.com/stnolting/neorv32/pull/684
Minor rtl edits by @stnolting in https://github.com/stnolting/neorv32/pull/690
rework watchdog timer and reset system by @stnolting in https://github.com/stnolting/neorv32/pull/692
implement vectored mtvec by @NikLeberg in https://github.com/stnolting/neorv32/pull/691
Minor rtl optimizations and cleanups by @stnolting in https://github.com/stnolting/neorv32/pull/694
[PMP] logic optimization by @stnolting in https://github.com/stnolting/neorv32/pull/695
[SW] Warning removed of unused variable by @emb4fun in https://github.com/stnolting/neorv32/pull/696
:warning: rework SoC bus protocol by @stnolting in https://github.com/stnolting/neorv32/pull/697
[SW] Illegal instruction removed by @emb4fun in https://github.com/stnolting/neorv32/pull/698
[dma] add "transfer done" flag by @stnolting in https://github.com/stnolting/neorv32/pull/699
Update correct file by @lianakoleva in https://github.com/stnolting/neorv32/pull/702
minor edits and optimizations by @stnolting in https://github.com/stnolting/neorv32/pull/703
Match existing filename by @lianakoleva in https://github.com/stnolting/neorv32/pull/704

New Contributors

@lianakoleva made their first contribution in https://github.com/stnolting/neorv32/pull/702

Full Changelog: https://github.com/stnolting/neorv32/compare/v1.8.9...v1.9.0