Mipt Mips Versions Save

Adoption of C++20 for cleaner code:

• Implementation-independent signed number representation
• Concepts
• Concept-constrained auto

Bug fixes

• #1507 and #1508

Convergence with mainline RISC-V opcodes

• https://github.com/riscv/riscv-opcodes/pull/112
• https://github.com/riscv/riscv-opcodes/pull/113
• https://github.com/riscv/riscv-opcodes/pull/114
• https://github.com/riscv/riscv-opcodes/pull/118
• https://github.com/riscv/riscv-opcodes/pull/119
• https://github.com/riscv/riscv-opcodes/pull/120
• https://github.com/riscv/riscv-opcodes/pull/121
• https://github.com/riscv/riscv-opcodes/pull/122

Testing infrastructure upgrades

• LLVM 14

External bugs reported

• Visual Studio: 1662465
• LLVM: https://github.com/llvm/llvm-project/issues/53961, https://github.com/llvm/llvm-project/issues/53997, https://github.com/llvm/llvm-project/issues/54011

RISC-V bit manipulation instructions

• bcli by Vasilii Matrenin
• bclr by Andrey Vyazovtsev
• bset by Ivan Panferov
• bseti by Kirill Radkin
• orc.b by Michael Bargatin
• sext.b by Alexey Otrashchenko
• Deprecate gorci.

Testing infrastructure upgrades

• LLVM 12

Extracted Flowchart visualizer to a separate repository: https://github.com/MIPT-ILab/PipelineFlowchartVis

Pipeline Visualization Tool by BSUIR students Alex Kulsha and Andrei Karpyza under Anton Lechanka supervising.

RISC-V bit manipulation instructions

• ror by Vladimir Graudt
• gorci by Alexey Shcherbakov
• max and maxu by Anton Okley
• rori by Egor Titov
• sbinv by Eugene Naydanov
• shfl by Mihail Fedorov
• min and minu by Vasilii Zaitsev
• sloi and sroi by Ravil Zakiryanov
• packu by Ivan Burtakov

Performance Simulation

• #1448: wrongpath code prefetching by Vladislav Zhuravski

Bug fixes

• #1257 follow up: pipeline must be flushed only once per cycle.
• RISC-V bfp instruction fixed according to 0.92 specification.

Testing infrastructure upgrades

• #512: unit tests for Branch module and infrastructure to test more modules by Vladimir Graudt
• #1409, #1410: clean up of RISC-V ALU and testing code by Vladimir Graudt
• C++20
• Catch 2.13.6
• GDB 10.2
• ELFIO 3.8

Switched to Github Actions from Travis CI

External PRs

• LGTM: https://github.com/github/codeql/issues/5709
• LLVM: 46235
• RISC-V: https://github.com/riscv/riscv-opcodes/pull/53

99.99% test coverage!

Functional simulation

• MARS system calls for RISC-V ISA by Eric Konks
• Support of .bss Elf sections by Pavel Kryukov

Performance simulation

• #1257: make system calls flush pipeline to maintain functional correctness by Eric Konks
• #1233: branch prediction bug reported by Oleg Ladin, fixed by Pavel Kryukov
• #1256: register state duplication to maintain functional correctness by Pavel Kryukov

RISC-V

• Support of SLLID, SRLID, SRAID, and ADDID instructions by Pavel Kryukov

Testing infrastructure upgrades

• Catch 2.11.1
• Clang-Tidy 10
• GDB 9.1
• LGTM
• Microsoft Visual Studio 2019
• OpenCppCoverage

External PRs

• CEN64: https://github.com/n64dev/cen64/pull/141, https://github.com/n64dev/cen64/pull/142, https://github.com/n64dev/cen64/pull/143, https://github.com/n64dev/cen64/pull/144
• GDB: build/25268, build/25289
• LLVM: 44816, 44977, 45046, 45507, 45514
• POPL: https://github.com/badaix/popl/pull/18, https://github.com/badaix/popl/pull/19
• RISC-V: https://github.com/riscv/riscv-opcodes/pull/41

RISC-V bit manipulation instructions

• bfp by Kirill Chemrov
• clmul by Yaroslav Okatev
• clz and ctz by Alexandr Vinogradov
• grev by Airat Nazmiev
• gorc by Roman Zlobin
• orn by Igor Bulatov
• pack by Daniel Kofanov
• pcnt by Nikolay Zernov
• rol by Nikita Gorbachev
• sbext by Vladimir Prokhorov
• slo by Eric Konks
• sro by Maxim Davydov
• unshfl by Yuly Tarasov and Pavel Kryukov
• xnor by Ilya Burtakov

Performance simulation

• #1200: branch prediction bug reported by Oleg Ladin, fixed by Pavel Kryukov

Tools

• Automated pipeline graphs by Eric Konks
• Standalone cache model by Pavel Kryukov

Testing infrastructure upgrades

• ARM-hosted builds on Travis CI
• Clang-Tidy 9

New Manuals

• „RISC-V Binutils“ by Kirill Korolev

External PRs

• CEN64: https://github.com/n64dev/cen64/pull/137
• GDB: f47674be
• LLVM: 44031, 44065, 44229
• Visual Studio: 833637, 846216

99% test coverage!

RISC-V

• Functional modeling of C instructions by Pavel Kryukov and Rustem Yunusov

System simulation updates by Pavel Kryukov

• MIPS32/MARS exception handling
• System calls support for performance simulation
• Interactive cycle-accurate modeling with GDB

Cache modeling

• Models of infinite and always-hit tag arrays by Andrey Agrachev and Pavel Kryukov
• Configurable replacement policy of IC and BP by Pavel Kryukov
• Optimized true LRU implementation by Pavel Kryukov

Outputs

• Modularized logging by Pavel Kryukov

External PRs

• LLVM: 43109

98% test coverage!

RISC-V

• Test infrastructure by Pavel Kryukov
• I instructions implemented by Pavel Kryukov
• M instructions implemented by Yaheni Sharamed
• C instructions decoder by Rustem Yunusov
• Print of 128 bit numbers by Andrey Agrachev

System simulation

• Several options of precise trap modeling by Vsevolod Pukhov
• Build with 'vanilla' GDB 8.3 source files by Pavel Kryukov
• GDB-driven manipulations with registers and program counter by Pavel Kryukov

Branch prediction

• Decoupling of BTB and BP pipelines by Yan Logovsky and Pavel Kryukov
• Early detection of branch target mispredictions by Yan Logovsky
• Performance improvement for MIPS likely branches by Rustem Yunusov
• Calculation of branch misprediction rate by Yaheni Sharamed
• Bypass of return address to execution by Yaheni Sharamed
• Bug fixes:
  • Do not flush pipeline on target mispredict for not taken branch (Yan Logovsky)
  • Allow update of BTB from short mispredicts and long mispredicts (Rustem Yunusov)

Cache improvements by Andrey Agrachev

• Infrastructure for cache replacement policies
• Pseudo-LRU replacement policy
• Use of Google Dense Hash for simulation speed

Execution pipeline improvement by Egor Bova

• Initial support for multi-wide writeback stage

MIPS

• Generation of MIPS traps by Vsevolod Pukhov
• Unit tests for MIPS instructions by Egor Bova. Bug fixes:
  • Treat dadd and daddu as MIPS III instructions
  • Fix of 64-bit multiplication on x86 targets and/or VS builds
  • Branch-and-link instructions should link even if not taken
  • Use only LSB of the variable shift RHS operand (#709)
• Decoding of CP1 (floating point) instructions by Egor Bova.
• Support of branch delay slot by Pavel Kryukov and Andrey Agrachev
• Big-endian MIPS by Pavel Kryukov

Complete refactoring of port system by Pavel Kryukov

• Dynamic type matching
• Self-cleaning
• Arena allocations with optimizations for POD-based data structures
• Type erasure for ports to reduce amount of templates
• Translation of port templates in a separate translation unit
• As a result, 1.5x simulation speed and 2x compilation speed boosts

New manuals

• Branch prediction pipelines by Rustem Yunusov (in progress)

External PRs:

• Boost: https://github.com/boostorg/multiprecision/issues/129
• GDB: 444b3fa, 8f0a214, dc7e818, 7516c26
• LLVM:
  • clang-tidy/40599
  • clang-tidy/40600
  • clang-tidy/40601
  • clang-tidy/40604
  • clang-tidy/40633
  • clang-tidy/40640
• POPL: https://github.com/badaix/popl/pull/16
• RISC-V:
  • https://github.com/riscv/riscv-opcodes/pull/23
  • https://github.com/riscv/riscv-opcodes/pull/26
  • https://github.com/riscv/riscv-tests/pull/183
• Visual Studio:
  • 451137
  • 457095
  • 457098

MIPS

• Compatibility with basic MARS system calls conventions by Vyacheslav Kompan
• Interactive functional simulation mode with GDB by Vyacheslav Kompan
• Interface-level integration to cycle-accurate simulation of Nintendo® 64 in CEN64 environment by Pavel Kryukov

Branch prediction

• Extraction of branch misprediction unit of Mem unit by Yauheni Sharamed
• 'Always not taken' branch prediction mode by Yan Logovsky
• Bubble sort to demonstrate sensitivity of IPC to branch prediction by Yauheni Sharamed

Quality assurance

• Unit tests for MIPS instructions by Vsevolod Pukhov. One bug reported.
• Unit test coverage for branch prediction modes by Yan Logovsky. One bug reported.

Code quality

• Decoupling functional memory from CPU simulation by Vyacheslav Kompan. Pavel Kryukov, and Arsen Davtyan
• Deep refactoring of MIPS decoding code by Andrey Agrachev, Vsevolod Pukhov and Pavel Kryukov
• Narrow-safe type conversion by Arsen Davtyan
• Endian-wrapping infrastructure by Pavel Kryukov
• Lazy dumping mode by Pavel Kryukov

New manuals:

• „Implementation of Data Bypassing and Scoreboard“ by Denis Los
• „How to debug MIPT-MIPS with GDB“ by Ivan Startsev (in progress)

External PRs:

• GDB: 2283a21
• CEN64:
  • https://github.com/n64dev/cen64/pull/100
  • https://github.com/n64dev/cen64/pull/101
  • https://github.com/n64dev/cen64/pull/102
  • https://github.com/n64dev/cen64/pull/104
  • https://github.com/n64dev/cen64/pull/105
  • https://github.com/n64dev/cen64/pull/107
  • https://github.com/n64dev/cen64/pull/108
  • https://github.com/n64dev/cen64/pull/109
  • https://github.com/n64dev/cen64/pull/110
• LLVM: 39770
• POPL: https://github.com/badaix/popl/pull/15
• RISC-V: https://github.com/riscv/riscv-opcodes/pull/22
• ELFIO: https://github.com/serge1/ELFIO/pull/28

Micro-architectural precision:

• Support bypass for MIPS mthi instruction by Denis Los

Quality assurance:

• Sequence identifier of executed instruction by Yan Logovsky and Pavel Kryukov
• Code coverage tracking with CodeCov by Pavel Kryukov
• Infrastructure to select MIPS ISA version by Pavel Kryukov

Bug fixes:

• MIPS64: fixes for LWL, SWL, and SRL instructions by Pavel Kryukov

Integration of portable libraries:

• Catch2: single-header framework for unit tests. Integrated by Vyacheslav Kompan and Pavel Kryukov.
• POPL: single-header options parser developed by Johannes Pohl. Integrated by Pavel Kryukov.
• ELFIO: C++ ELF parser developed by Serge Lamikhov-Center. Integrated by Pavel Kryukov.

New manuals:

• „IPC sensitivity to cache line size“ by Aleksandr Misevich

External PRs:

• POPL: see 1.2.0 release notes
• ELFIO: https://github.com/serge1/ELFIO/issues/26, https://github.com/serge1/ELFIO/issues/27

Micro-architectural precision:

• Fetching unit incorporating Instruction cache by Aleksandr Misevich
• Data bypasses and complex pipeline by Denis Los

Support of more MIPS instructions:

• Multiplication and division instructions:
  • MIPS I: mult, multu, div, divu, mfhi, mflo, mthi, mtlo by Pavel Kryukov
  • MIPS32: mul by Pavel Kryukov
• Accumulating multiplication of MIPS32 by Andrei Sultan: madd, maddu, msub, msubu
• Unaligned memory accesses by Andrei Sultan: lwl, lwr, swl, swr
• Linked loads/conditional stores without atomicity warranties by Pavel Kryukov: ll, sc

MIPS64 infrastructure and experimental implementation of instructions by Kirill Nedostoev, Alexander Timofeev, and Pavel Kryukov

• Doubleword arithmetics (MIPS III): dadd, daddiu, daddu, dsub, dsubu
• Doubleword shifts (MIPS III): dsll, dsll32, dsra, dsra32, dsrl, dsrl32
• Doubleword variable shifts (MIPS III): dsllv, dsrav, dsrlv
• Doubleword memory accesses (MIPS III): ld, lwu, sd, lld, scd
• Doubleword multiplication/division (MIPS III): ddiv, ddivu, dmult, dmultu
• Doubleword count leading zeroes/ones (MIPS64): dclo, dclz

RISC-V preparations by Aleksandr Misevich:

• Generalized infrastructure to support several ISA
• Placeholder for RISC-V implementation
• Implementation of RISC-V register file

Quality Assurance:

• CMake build and testing flow by Konstantin Soshin
• Unit tests for Register and Register File classes by Aleksandr Misevich
• Strict timing primitives by Denis Los
• Wrong code detector by Pavel Kryukov

Simulation speed improvements:

• Cached instruction integration to performance simulation by Pavel Kryukov

New manuals:

• „CMake“ by Konstantin Soshin
• „Introduction to TDD“ by Pavel Kryukov and Aleksandr Misevich

External PRs:

• AppVeyor: https://github.com/appveyor/ci/issues/2096, https://github.com/appveyor/ci/issues/2154
• EduMIPS64: https://github.com/lupino3/edumips64/issues/177
• LLVM: 36283, 36284, 36961, 36963
• Visual Studio: 225040