FPGA implementation of Canny edge detection by using Vivado HLS
FPGA Implementation of Canny edge detection by using Vivado HLS
Akira Yamawaki, Seiichi Serikawa, “A describing method of an image processing software in C for a high-level synthesis considering a function chaining,” IEICE trans. inf. & syst., vol.E101-D, no.2, February 2018.
MIT