Gateware Ts Save

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

Project README

gateware-ts

gateware-ts is a hardware definition library written in TypeScript for generating Verilog code, ready to be piped into the open source FPGA toolchain.

The project aims to:

  • Create a type-safe and modular way of specifying RTL hardware
  • Integrate and facilitate the use of the open source FPGA toolchains
  • Be approachable and usable by JavaScript and TypeScript developers

Examples

A few illustrative examples can be found in the examples directory (more to come in the future).

Project Status

This project is very much a work in progress, and as such is likely to contain many bugs and rough edges. If you're looking for a production ready embedded HDL, the nMigen is definitely a better bet! But if you're looking to learn and hack on FPGAs in a type safe language, give this project a go.

Open Source Agenda is not affiliated with "Gateware Ts" Project. README Source: gateware-ts/gateware-ts
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