Low level access to Cortex-M processors
Full Changelog: https://github.com/rust-embedded/cortex-m/compare/v0.7.6...v0.7.7
ptr()
function on all peripherals register blocks in favor of
the associated constant PTR
(#386).inline-asm
feature no longer requires a nightly Rust compiler, but
does require Rust 1.59 or above.singleton!()
statics sometimes ending up in .data
instead of .bss
(#364, #380).
(Backported from upcoming 0.8 release).DWT.set_cycle_count
(#347).cm7
to enable access to these (#352).delay::Delay::with_source
, a constructor that lets you specify
the SysTick clock source (#374).DWT::get_cycle_count
has been deprecated in favor of DWT::cycle_count
.
This change was made for consistency with the C-GETTER convention. (#349)asm::semihosting_syscall
, asm::bootstrap
, and
asm::bootload
.msp::write
has been deprecated in favor of asm::bootstrap
. It was not
possible to use msp::write
without causing Undefined Behavior, so all
existing users are encouraged to migrate.asm::delay
which could lead to incorrect codegen and
infinite loops.asm::delay
on multiple-issue CPU cores.InterruptNumber
trait is now required on interrupt arguments to the
various NVIC functions, replacing the previous use of Nr
from bare-metal.
For backwards compatibility, InterruptNumber
is implemented for types
which are Nr + Copy
, but this will be removed in a future version.PTR
is introduced to Core Peripherals to
eventually replace the existing ptr()
API.asm/lib.rs
documentation for more details.inline-asm
feature enabled used pre-built
objects which were built by a GCC compiler, while inline-asm
enabled the
use of llvm_asm!
calls. The asm system has been replaced with a new
technique which generates Rust static libs for stable calling, and uses the
new asm!
macro with inline-asm
. See the asm/lib.rs
documentation for
more details.ptr()
methods are now const
.SCB::invalidate_dcache
and related methods are now unsafe, see #188Peripherals
struct is now non-exhaustive, so fields may be added in future
non-breaking changesaligned
dependencyNVIC::clear_pending
NVIC::disable
NVIC::enable
NVIC::set_pending
SCB::system_reset
basepri
, basepri_max
, and faultmask
registers from thumbv8m.base