Cortex M Rtic Versions Save

Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers

v0.4.2

5 years ago

Added

  • Duration now has an as_cycles method to get the number of clock cycles contained in it.

  • An opt-in "nightly" feature that reduces static memory usage, shortens initialization time and reduces runtime overhead has been added. To use this feature you need a nightly compiler!

  • RFC 128 has been implemented. The exception and interrupt have gained a binds argument that lets you give the handler an arbitrary name. For example:

// on v0.4.1 you had to write
#[interrupt]
fn USART0() { .. }

// on v0.4.2 you can write
#[interrupt(binds = USART0)]
fn on_new_frame() { .. }

Changed

  • Builds are now reproducible. cargo build; cargo clean; cargo build will produce binaries that are exactly the same (after objcopy -O ihex). This wasn't the case before because we used randomly generated identifiers for memory safety but now all the randomness is gone.

Fixed

  • Fixed a non_camel_case_types warning that showed up when using a recent nightly.

  • Fixed a bug that allowed you to enter the capacity and priority arguments in the task attribute more than once. Now all arguments can only be stated once in the list, as it should be.