Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
Fixed some RPM packaging issues.
This release improves the Fletcher bus infrastructure for writing.
This allows to ensure bytes have landed in memory when the response "ok" bit is asserted. Once ArrayWriters signal on the unlock stream that a command is completed, the bytes are now guaranteed to be as written in memory.
This bit signifies a BufferWriter has sent the last write request for a command, allowing platform-specific implementations to perform some final action. One example is the fletcher_opae platform that requires a write fence to be produced. This is somewhat analogous to how ArrayBuilders in Arrow's various libraries have a Finish() function. On the AXI top level, this bit is exposed through the awuser(0) bit.
This release add support for a 64-bits wide data bus for the AXI4-lite MMIO interface.
This release upgrades Fletcher to depend on the first stable release of Arrow (v1.0.0).
Changes:
C++ runtime: WaitForFinish() is now called PollUntilDone().
Python runtime: wait_for_finish is now called poll_until_done.
The hardware construction library Cerata, used by Fletchgen, has been moved to a separate repository
Other than that, this release only contains some minor bugfixes that can be found in the commit log.