Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, B...
Image Processing Toolbox in Verilog using Basys3 FPGA
5-stage pipelined 32-bit MIPS microprocessor in Verilog
Implementation of a simple SIMD processor in Verilog, core of which is a...
DDR2 memory controller written in Verilog
Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Resul...