Rocket Chip Generator
SonicBOOM: The Berkeley Out-of-Order Machine
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order c...
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with O...
Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket M...
RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
Tests for example Rocket Custom Coprocessors
The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework,...
Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and perip...
C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)
A fault-injection framework using Chisel and FIRRTL