Haskell to VHDL/Verilog/SystemVerilog compiler
Hardware Description Languages
A C-like hardware description language (HDL) adding high level synthesis...
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO...
Implementation of a Tensor Processing Unit for embedded systems and the ...
SystemRDL 2.0 language compiler front-end
A core language for rule-based hardware design 🦑
Using HDL, from Boolean algebra and elementary logic gates to building a...
ACT hardware description language and core tools.
Control and status register code generator toolchain