An Open-source FPGA IP Generator
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branc...
NVDLA is an Open source DL/ML accelerator, which is very suitable for in...
A version of the HDMI2USB firmware based around LiteX tools produced by ...
An Open Source configuration of the Arty platform
The Antikernel operating system project
MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
The Task Parallel System Composer (TaPaSCo)
Basic RISC-V Test SoC
An AXI4 crossbar implementation in SystemVerilog
PYNQ example of using the RFSoC as a QPSK transceiver.
Yet Another RISC-V Implementation
HLS branch of Halide
Z80 CPU for OpenFPGAs, with Icestudio
RFSoC Spectrum Analyser Module on PYNQ.