A core language for rule-based hardware design 🦑
Neural Network Verification Software Tool
Formal specification and generation of verifiable binary parsers, messag...
A modular sat/smt solver with proof output.
Public snapshots of "ACSL by Example"
Legacy code connected to the high-assurance implementation of the Ourobo...
A script for running TLA+/TLC from the command line
A Coq-based synthesis of Scala programs which are correct-by-construction
Automated Schedule Generation for Time-Sensitive Networks (TSN).
Easiest-ever formal methods language! Designed for developers crafting d...
CoreIR Symbolic Analyzer
Galois RISC-V ISA Formal Tools
The Verifiably Safe Reinforcement Learning Framework
Build an educational formally verified version of the Nand 2 Tetris cour...