Fusesoc Versions Save

Package manager and build abstraction tool for FPGA/ASIC development

1.4

8 years ago
  • Allow setting top-level parameters in backends
  • Allow FuseSoC to handle verilator CLI arguments
  • Parse command-line before building sim model
  • Support plusargs in XSIM
  • Initial IP-Xact support (FileSets and description)
  • Add distutils-based build system and add to pypi
  • Support mixed-language (VHDL, verilog, SV) in ModelSim
  • Support mixed-language (VHDL, verilog, SV) in XSIM
  • Add fileset sections (replaces vhdl/verilog sections)
  • Allow per-file attributes in .core
  • + improved error handlig, bug fixes and refactoring

1.3

8 years ago
  • Add item to .core files to explicitly apply patches
  • Export FuseSoC dirs as env vars to external commands
  • Use relative paths everywhere
  • Always rebuild sim model, except when --keep is used
  • Prettify core-info output
  • Generate CAPI directly from section.py
  • Add more helpful data types to section members
  • Support multiple top-level testbenches
  • Add git provider
  • Add pgm option to ISE backend
  • Add support for Xilinx ISIM Simulator
  • Abort FuseSoC on scripts with non-zero return code
  • Run scripts from all core deps in simulations
  • Add parameter section (replaces plusargs)
  • Add support for Xilinx XSIM Simulator
  • + improved error handling, bug fixes and refactoring