Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), BPF, Ethereum VM, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
[ Core ]
[ X86 ]
[ ARM ]
[ ARM64 ]
[ Mips ]
[ PPC ]
[ Sparc ]
[ SystemZ ]
[ Python binding ]
Changelog:
Core
X86
ARM
ARM64
Visual Basic binding
Fix many bugs, and add new architecture TMS320C64X.
See http://www.capstone-engine.org/Version-3.0.5-RC2-changelog for details on important changes.
4.0-alpha4 release with some important bug-fixes from 4.0-alpha3 version.
Changelog:
Core
X86
ARM
Sparc
Python binding
Java binding
4.0-alpha3 release with some important security bug-fixes from 4.0-alpha2 version.
4.0-alpha2 release with some important security bug-fixes from 4.0-alpha1 version.
ChangeLog
Library:
X86:
PowerPC:
Mips:
Arm:
IT
instruction.XCore:
Python:
setup.py
supports option --user
if not in a virtualenv to allow for local usage.See here for the changelog of this alpha version: https://github.com/aquynh/capstone/wiki/ChangeLog-4.0-alpha1