VSCode SystemVerilog Versions Save

SystemVerilog support in VS Code

v0.13.3

7 months ago

What's Changed

adding compileOnOpen setting option by @joennlae in https://github.com/eirikpre/VSCode-SystemVerilog/pull/172
removing cache in hopes that workflow errors will be resolved by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/184
bump terser to version 5.15.0 by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/185
fix: #177: Properly handle Windows paths in Verilator output by @agg23 in https://github.com/eirikpre/VSCode-SystemVerilog/pull/178
Remote ssh performance by @eirikpre in https://github.com/eirikpre/VSCode-SystemVerilog/pull/164
fix: Added debounce delay for saving indexes by @agg23 in https://github.com/eirikpre/VSCode-SystemVerilog/pull/183
release notes for 0.13.3 by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/187

New Contributors

@joennlae made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/172
@agg23 made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/178

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/compare/v0.13.2...v0.13.3

v0.13.2

1 year ago

What's Changed

modified formatter command parser to support windows paths by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/160
module instantiator now detects parameters correctly by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/163

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/compare/v0.13.1...v0.13.2

v0.13.1

1 year ago

What's Changed

Remote ssh performance by @eirikpre in https://github.com/eirikpre/VSCode-SystemVerilog/pull/162

New Contributors

@eirikpre made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/162

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/compare/v0.13.0...v0.13.1

v0.13.0

1 year ago

What's Changed

input/output/input now have different icons in the outline tree by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/151
Format module instance and dropdown list of modules for auto-instantiator by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/152
support more file extensions and no extension in antlr parser by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/149
Bump minimist from 1.2.5 to 1.2.6 by @dependabot in https://github.com/eirikpre/VSCode-SystemVerilog/pull/155
Include indexing docs by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/158

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/compare/v0.12.1...v0.13.0

v0.12.1

1 year ago

What's Changed

Update, maintain, and optimize extension by @jecassis in https://github.com/eirikpre/VSCode-SystemVerilog/pull/135

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/compare/v0.12...v0.12.1

v0.12

1 year ago

What's Changed

Add some development documentation to README by @gasrodriguez in https://github.com/eirikpre/VSCode-SystemVerilog/pull/121
Bump glob-parent from 5.1.1 to 5.1.2 by @dependabot in https://github.com/eirikpre/VSCode-SystemVerilog/pull/124
Bump path-parse from 1.0.6 to 1.0.7 by @dependabot in https://github.com/eirikpre/VSCode-SystemVerilog/pull/126
Fixing npm run compile on MacOS by @sw23 in https://github.com/eirikpre/VSCode-SystemVerilog/pull/133
Adding option to use verible-verilog-lint as compiler by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/130
Improving syntax highlighting support for UDP tables by @sw23 in https://github.com/eirikpre/VSCode-SystemVerilog/pull/134
GitHub Actions by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/140
added word boundaries around illegal symbols by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/141
Implemented ReferenceProvider by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/129
added badges and recommendations by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/145
added changelog for next release (0.12) by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/146
updated package version by @joecrop in https://github.com/eirikpre/VSCode-SystemVerilog/pull/147

New Contributors

@gasrodriguez made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/121
@sw23 made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/133
@joecrop made their first contribution in https://github.com/eirikpre/VSCode-SystemVerilog/pull/130

Full Changelog: https://github.com/eirikpre/VSCode-SystemVerilog/commits/v0.12