SystemVerilog support in VS Code
This VS Code extension provides features to read, navigate and write SystemVerilog code much faster.
Ctrl+Shift+O
)Ctrl+T
)Ctrl+LeftClick
)Ctrl+LeftClick
)systemverilog.excludeIndexing
, e.g.: **/syn/**
systemverilog.documentSymbolsPrecision
setting may need to be reduced down to 'full_no_references'. Doing this will turn off the 'find references' feature which will dramatically speedup the parsing.systemverilog.maxLineCountIndexing
setting can be tuned to prevent full parsing of these files, which will improve extension performance.systemverilog.includeIndexing
: Array, Files included for indexing (glob pattern). Examples:
*
at front of pattern denotes path is relative to workspace root): **/rtl/**/*.{sv,v,svh,vh}
**/*.svp
/abs/path/to/workspace/rtl/**/*.{sv,v,svh,vh}
systemverilog.disableIndexing
: Boolean, Disable indexingsystemverilog.excludeIndexing
: String, Exclude files from indexing based on a glob pattern. Examples:
**/synth/*
**/{synth,pnr}/**
**/compile/*.v
{**/synth/**,**/compile/*.v}
systemverilog.forceFastIndexing
: Boolean, Use fast regular expression parsingsystemverilog.enableIncrementalIndexing
: Boolean, Enable incremental indexation as files are openedsystemverilog.parallelProcessing
: Integer, Number of files to process in parallel during indexingsystemverilog.forceFastIndexing
: Boolean, force indexer to bo basic parsing. Good for when the extension takes too long to initialize.systemverilog.enableIncrementalIndexing
: Boolean, Enable incremental indexation as you open files.systemverilog.maxLineCountIndexing
: Boolean, When indexing a file, if the line count is larger than this number, fast indexing will be used to improve symbol lookup performance, as fewer symbols will be parsed.systemverilog.documentSymbolsPrecision
: String, The level of detail the parser should use when looking for symbols:
systemverilog.antlrVerification
: Boolean, Use ANTLR parser to verify code in real-timesystemverilog.verifyOnOpen
: Boolean, Run ANTLR verification on all files when opened.systemverilog.launchConfigurationVerilator
: String, Command to run when launching verilator
systemverilog.launchConfigurationVCS
: String, Command to run when launching VCS
systemverilog.launchConfigurationVerible
: String, Command to run when launching Verible
systemverilog.excludeCompiling
: String, Files excluded from compiling when saved based on a glob pattern
systemverilog.compileOnSave
: Boolean, Compile files when saved
true
systemverilog.compilerType
: String, Dropdown list to select a compiler type
Verilator
systemverilog.trace.server
: String, Dropdown to select verbosity of LSP message tracingsystemverilog.compileOnOpen
: Boolean, Compile all files when opened
false
Use the provided settings in a user or workspace settings.json
as appropriate. Here are a few examples:
{
"editor.bracketPairColorization.enabled": true, // turn on bracket pair coloring
"editor.guides.bracketPairs": "active", // turn on bracket pair guides
// Change theme default colors for specific tokens
// To find tokens use: https://code.visualstudio.com/api/language-extensions/syntax-highlight-guide#scope-inspector
"editor.tokenColorCustomizations": {
// Customize per theme or globally
"[Theme Name]": {
"textMateRules": [
{
// Workaround: Extension marks escaped identifiers as regular expressions to prevent bracket matching,
// so recoloring it back to identifier color
"scope": ["string.regexp.identifier.systemverilog"],
"settings": {
"foreground": "#e06c75"
}
}
]
}
},
// Customize formatting command to suite preferences
"systemverilog.formatCommand": "verible-verilog-format --assignment_statement_alignment=preserve --case_items_alignment=infer --class_member_variables_alignment=infer --formal_parameters_alignment=preserve --formal_parameters_indentation=indent --named_parameter_alignment=flush-left --named_parameter_indentation=indent --named_port_alignment=flush-left --named_port_indentation=indent --net_variable_alignment=preserve --port_declarations_alignment=preserve --port_declarations_indentation=indent",
// Add additional file extensions to associate with SystemVerilog and include them in the indexing
"files.associations": {
"*.svi": "systemverilog",
"*.svp": "systemverilog",
"*.pkg": "systemverilog"
},
"systemverilog.includeIndexing": ["**/*.{sv,v,svh,vh,svi,svp,pkg}"]
}
Please exercise caution when setting an executable path in the settings, such as the case with systemverilog.formatCommand
, systemverilog.launchConfigurationVerilator
, systemverilog.launchConfigurationVCS
, and systemverilog.launchConfigurationVerible
. Any spaces will be assumed to be arguments and not the executable itself. In Windows, for example, you might have an executable configured as follows:
"systemverilog.formatCommand" : "C:\\Program Files\\verible\\bin\\verible-verilog-format --case_items_alignment=infer"
Because of the space in 'Program Files', the extension will infer that the executable is C:\\Program
with two arguments: Files\\verible\\bin\\verible-verilog-format
and --case_items_alignment=infer
. This breaks the executable path. There are a couple solutions for tihs:
"systemverilog.formatCommand" : "verible-verilog-format --case_items_alignment=infer"
"systemverilog.formatCommand" : "C:\\PROGRA~1\\verible\\bin\\verible-verilog-format --case_items_alignment=infer"
npm install
src\compiling\ANTLR\grammar\build
):npm run compile
See the changelog